Protection Principle and Technology of the VSC-Based DC Grid by Bin Li & Jiawei He

Author:Bin Li & Jiawei He
Language: eng
Format: epub
ISBN: 9789811566448
Publisher: Springer Singapore

Times of “+”

3.75(n + 1)

3.75(n + 1) + 2.5

3.75n

3.75n + 2.5

Similarly, under the conditions with other values of n, the calculation times can be evaluated by the same methods, as shown in Table 6.2.

At present, with the development of the hardware technology, the above calculations can be completed very quickly. For example, the DSP TMS320F2833x, which is a typical processor used in the dc protection and control [25], has the 150 MHz operation rate. In another word, the cycle time is 6.67 ns, during which one time of the multiplication or addition can be completed. Therefore, even if the processor is serial-processing, the time of 144 multiplication and 120 addition is only about 1.76 μs. Obviously, this time scale is very small for the dc protection (ms-level). So it can be concluded that, for the present dc protection hardware platform, the complexity of wavelet transform algorithm is very tiny.

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